The present invention relates to a power-on reset circuit and, more particularly, to a power-on reset circuit for having a reset signal released or set under such time as when a power supply voltage rises or falls.
As shown in FIG. 5, a power-on reset circuit is connected to an internal circuit and operates to release a reset state of the internal circuit in accordance with the transition of its output signal from "High" to "Low" level, and to reset the internal circuit in accordance with the transition of its output signal from "Low" to "High" level.
A conventional power-on reset circuit of this kind to which the present invention relates comprises, as shown in FIG. 6, a first reference potential circuit 21, a second reference potential circuit 22 and a comparator circuit 3. The first reference potential circuit 21 and the second reference potential circuit 22 are so designed that the respective output voltage curves with respect to the power supply voltages are different from each other and intersect with each other at a predetermined power supply voltage, namely, at the reset release voltage or the set voltage. The comparator circuit 3 compares an output voltage Vb of the first reference potential circuit 21 and an output voltage Va of the second reference potential circuit 22.
The first reference potential circuit 21 comprises resistors R.sub.11, R.sub.12 and diodes D.sub.11, D.sub.12, D.sub.13, all connected in series between a power supply terminal V.sub.DD and a ground terminal. The second reference potential circuit 22 comprises resistors R.sub.13, R.sub.14 and diodes D.sub.14, D.sub.15, all connected in series between the power supply terminal V.sub.DD and the ground terminal.
The above conventional power-on reset circuit operates as hereinafter explained.
FIG. 7 shows in a graph a relationship of the output voltages Vb, Va, of the first and second reference potential circuits 21, 22, with respect to the power supply voltages V.sub.DD.
Immediately after the rising of the power supply voltage, the diodes D.sub.11 through D.sub.15 are all in their OFF state, so that the output voltages Vb, Va of the first and second reference potential circuits 21, 22 are gradually increased coincidentally with the increase in the power supply voltage V.sub.DD. Assuming that the threshold voltage at which each of the diodes D.sub.11 through D.sub.15 turns to its ON state is V.sub.F, the current starts to flow in the diode D.sub.14, D.sub.15 at the point of time when the power supply voltage V.sub.DD becomes V.sub.DD &gt;2.multidot.V.sub.F. Subsequently, the output voltage Va outputted from the second reference potential circuit 22 changes as shown by the following equation (1): ##EQU1## wherein V.sub.F (i) is a forward-direction drop voltage of one diode which appears when the current flowing in the first and second reference potential circuits 21, 22 is i. Thus, from this stage onward, the relation Vb&gt;Va is maintained and the output of the comparator circuit 3 is rendered to the "High" level thereby having the reset state of the internal circuit started.
When the power supply voltage V.sub.DD increases further and becomes V.sub.DD &gt;3.multidot.V.sub.F, the current Vb starts to flow in the diodes D.sub.11, D.sub.12, D.sub.13 and, thereafter, the output voltage Vb outputted from the first reference potential circuit 21 changes as shown by the following equation (2): ##EQU2##
Therefore, where the resistance values of the resistors R.sub.11 through R.sub.14 is set to satisfy the relation R.sub.14 /(R.sub.13 +R.sub.14)&gt;R.sub.12 (R.sub.11 +R.sub.12), the degree of an increase in the output voltage Va becomes larger than that of an increase in the output voltage Vb as the power supply voltage V.sub.DD rises with a consequence that the relation between the output voltages Vb and Va becomes Va&gt;Vb at the point when the power supply voltage V.sub.DD reaches a predetermined voltage. The power supply voltage V.sub.DD at this point is a reset potential (V.sub.RESET) and, thereafter, the reset operation in the internal circuit is released.
However, in the conventional power-on reset circuit explained above, when the power supply voltage V.sub.DD is 2.multidot.V.sub.F or lower, the output voltages become Va=Vb resulting in a problem that the output of the comparator circuit 3 becomes unstable. In the case where a number n of diodes are connected in series, the output of the comparator circuit remains unstable until the power supply voltage V.sub.DD becomes V.sub.DD &gt;n.multidot.V.sub.F. For this reason, the power-on reset circuit of this kind is unsuited to be used in a system which requires guarantee of operation under voltages in the order of 1 to 2 V.
In a conventional power-on reset circuit, even when the elements used for the resistors and diodes forming the first and second reference potential circuits are of those having the same characteristics, there is no strong correlation between the characteristic curve of the output voltage Va and that of the output voltage Vb since the current values of the currents which flow in these reference potential circuits are not the same, which results in a problem that the reset voltage V.sub.RESET varies depending on the variations in the resistors and the diodes employed.